On Fri, Aug 28, 2020 at 09:55:49PM +0530, Tanmay Jagdale wrote:
Hi All,
While making the MPIDR related changes in UEFI, i.e reading it from QEMU's device tree based on Leif's patch I thought of updating the SSDT and PPTT topologies to match it.
The current SSDT table is implemented without a cluster and core kind of topology. So it looks as follows
Scope (_SB) { Device (C000) { Name (_HID, "ACPI0007"), Name (_UID, 0) } ... ... Device (Cxxx) { Name (_HID, "ACPI0007"), Name (_UID, coreid) } }
After looking at Graeme's TF-A tree, the topology would be as follows - No SMT since MT bit isn't set - Cluster with upto 8 Cores - N clusters which is set at 64 currently
So I'm thinking to updating SSDT table with the following structure
Scope (_SB) { Device (CL00) { // Cluster 0 Name (_HID, "ACPI0010"), Name (_UID, 0x0)
Device (CP00) { // Cluster 0 Cpu0 Name (_HID, "ACPI0007"), Name (_UID, (clusterid | 0x0)), } ... Device (CP07) { // Cluster 0 Cpu 7 Name (_HID, "ACPI0007"), Name (_UID, (clusterid | coreid)), } } ... ... Device (CLXX) { // Cluster 63 Name (_HID, "ACPI0010"), Name (_UID, clusteridx)
Device (CP00) { // Cluster 63 Cpu 0 Name (_HID, "ACPI0007"), Name (_UID, (clusteridx | coreidx)), } ... Device (CP07) { // Cluster 63 CPU 7 Name (_HID, "ACPI0007"), Name (_UID, (clusteridx | coreidx)), } } }
Can you please review this structure and let me know if I can go ahead and make these changes in SSDT and PPTT table generation ?>
My understanding of 8.4.3 Processor Hierarchy (ACPi 6.3) is this would only be required if the clusters had power states on QEMU.
We don't have emulated caches anyway.
So I think you are probably making unneccessary work.
Graeme