Hi Luis,
On 11 Nov 2020, at 18:45, Luis Machado via Gnu-morello <gnu-morello(a)op-lists.linaro.org> wrote:
>
> From: Luis Machado <luis.machado(a)arm.com>
>
> Support the data_capability and code_capability types, which the capability
> counterparts of the data_ptr and code_ptr types.
>
> Adjust the Morello C registers to be of data_capability and code_capability
> types.
Out of interest, what's the justification behind this? In general the C
registers could be either data or code capabilities depending on whether
they're storing a function pointer (at least without a descriptor-based ABI).
Surveying the AArch64 and RISC-V XML files I see that data_ptr and code_ptr are
only used in cases where the registers are definitely only used for that, i.e.
PC is code_ptr and SP is data_ptr on AArch64, and on RISC-V RA also gets
code_ptr and GP, TP and FP get data_ptr, with everything else being left as an
integer. Should the CHERI equivalents not mirror that, with the general-purpose
registers remaining (u)intcap and only PCC and CSP having more-specific types?
Jess