diff --git a/ld/testsuite/ld-aarch64/aarch64-elf.exp b/ld/testsuite/ld-aarch64/aarch64-elf.exp index f6d579dab0ad88ee9e778a09cf7e3bf69a2f0be7..95c0e1bfec10bfb3810d88c5ae27c279dcbbb3b5 100644 --- a/ld/testsuite/ld-aarch64/aarch64-elf.exp +++ b/ld/testsuite/ld-aarch64/aarch64-elf.exp @@ -100,6 +100,14 @@ proc aarch64_page_plus_offset { page offset } { return [format %x [expr "0x$page + 0x$offset"] ]; } +# Return the 8-hexdigit truncation of an address. +proc aarch64_8digit_addr { addr { plusLSB 0 } } { + if { $plusLSB } { + return [aarch64_8digit_addr [format %08x [expr "0x$addr + 1"]]]; + } + return [string range "$addr" end-7 end]; +} + set eh-frame-merge-lp64 [list [list "EH Frame merge" \ [concat "-m " [aarch64_choose_lp64_emul] \ " -Ttext 0x8000"] \ diff --git a/ld/testsuite/ld-aarch64/emit-relocs-morello-6.d b/ld/testsuite/ld-aarch64/emit-relocs-morello-6.d index 0baf1c49fbde25731b97f4fe71cb9c98b864d021..6c8af70a7a6cdcde79cb919f2526a27ec8989615 100644 --- a/ld/testsuite/ld-aarch64/emit-relocs-morello-6.d +++ b/ld/testsuite/ld-aarch64/emit-relocs-morello-6.d @@ -1,13 +1,9 @@ # Check handling relocations into the got that require a GOT entry. # This case handles PIE binaries. # -# This testcase uses exact values in order to check that of the two GOT entries -# created, the one that is referenced by the first instruction in _start is -# the one which has the LSB set in its value. -# -# Have tried to mitigate the flakyness of the test with a linker script that -# aligns .text and the GOT to 12 bits so that the ldr addends are just offsets -# into the GOT and we are likely to get .text at 0x1000. +# This testcase checks that of the GOT entries created, the ones that are +# referenced by the first and ast instructions are the one which have the LSB +# set in their value. #source: emit-relocs-morello-6.s #as: -march=morello+c64 #ld: -Ttext-segment 0x100000 -T emit-relocs-morello-7.ld -pie -static @@ -19,42 +15,52 @@ Disassembly of section \.text: -0000000000100100 <_start>: - 100100: c2400c00 ldr c0, \[c0, #48\] - 100104: c2400800 ldr c0, \[c0, #32\] - 100108: c2401000 ldr c0, \[c0, #64\] - 10010c: c2400400 ldr c0, \[c0, #16\] +#record: START_ADDR +([0-9a-f]+) <_start>: + .* ldr c0, \[c0, #48\] + .* ldr c0, \[c0, #32\] + .* ldr c0, \[c0, #64\] + .* ldr c0, \[c0, #16\] Disassembly of section \.data: -00000000001001e8 : - 1001e8: 0000000a .* +#record: DATA_OBJ_ADDR +([0-9a-f]+) : + .*: 0000000a .* -00000000001001ec : - 1001ec: 0000000a .* +#record: DATA_FUNC_ADDR +([0-9a-f]+) : + .*: 0000000a .* Disassembly of section \.got: -0000000000101000 <\.got>: - 101000: 00100000 .* +#record: GOT_ADDR +([0-9a-f]+) <\.got>: + .* \.\.\. - 101010: 001001ed .* - 101010: R_MORELLO_RELATIVE \*ABS\* - 101014: 00000000 .* - 101018: 00000004 .* - 10101c: 02000000 .* - 101020: 00100100 .* - 101020: R_MORELLO_RELATIVE \*ABS\* - 101024: 00000000 .* - 101028: 00000f50 .* - 10102c: 04000000 .* - 101030: 00100100 .* - 101030: R_MORELLO_RELATIVE \*ABS\*\+0x1 - 101034: 00000000 .* - 101038: 00000f50 .* - 10103c: 04000000 .* - 101040: 001001e8 .* - 101040: R_MORELLO_RELATIVE \*ABS\* - 101044: 00000000 .* - 101048: 00000004 .* - 10104c: 02000000 .* +#check: DATA_FUNC aarch64_8digit_addr $DATA_FUNC_ADDR 1 + .*: DATA_FUNC .* + .*: R_MORELLO_RELATIVE \*ABS\* + .*: 00000000 .* + .*: 00000004 .* + .*: 02000000 .* +#check: START_ADDR_NOFUNC aarch64_8digit_addr $START_ADDR + .*: START_ADDR_NOFUNC .* + .*: R_MORELLO_RELATIVE \*ABS\* + .*: 00000000 .* +#record: PCC_BOUNDS + .*: (00000[1-9a-f][0-9a-f]+) .* + .*: 04000000 .* +#check: START_ADDR_FUNC aarch64_8digit_addr $START_ADDR + .*: START_ADDR_FUNC .* + .*: R_MORELLO_RELATIVE \*ABS\*\+0x1 + .*: 00000000 .* +#check: PCC_BOUNDED string tolower $PCC_BOUNDS + .*: PCC_BOUNDED .* + .*: 04000000 .* +#check: DATA_OBJ aarch64_8digit_addr $DATA_OBJ_ADDR + .*: DATA_OBJ .* + .*: R_MORELLO_RELATIVE \*ABS\* + .*: 00000000 .* + .*: 00000004 .* + .*: 02000000 .*