From: Kevin Brodsky kevin.brodsky@arm.com
RCSP is currently considered as an EL0 register. However, Restricted registers are not banked, and as a result this assumes that the kernel itself does not modify it.
To enable the kernel to make use of RCSP, save and restore it when taking an exception from / returning to EL1, in addition to EL0.
Signed-off-by: Kevin Brodsky kevin.brodsky@arm.com --- arch/arm64/kernel/entry.S | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index 329f58c5d1fb..cfc1abc396af 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -309,6 +309,10 @@ alternative_else_nop_endif
scs_load_current .else +#ifdef CONFIG_ARM64_MORELLO + mrs c22, rcsp_el0 + str c22, [sp, #S_CSP + 16] +#endif add x21, sp, #PT_REGS_SIZE get_current_task tsk .endif /* \el == 0 */ @@ -476,6 +480,11 @@ alternative_else_nop_endif mte_set_user_gcr tsk, x0, x1
apply_ssbd 0, x0, x1 +#ifdef CONFIG_ARM64_MORELLO + .else + ldr c25, [sp, #S_CSP + 16] + msr rcsp_el0, c25 +#endif .endif
msr spsr_el1, x22