As per Morello arch ref manual:
"If the PE is in Restricted and an exception is taken from the current Exception level, exception entry uses the same exception vector as an exception taken from the current Exception level with SP_EL0"
This means for bpf programs running in Restricted mode at EL1, exceptions will use the el1t_64_sync_handler(), where the t suffix indicates SP_EL0 is being used.
Since el1t_xyz_handler's are currently unhandled, passthrough/reuse the existing exception handlers.
Signed-off-by: Zachary Leaf zachary.leaf@arm.com --- arch/arm64/kernel/entry-common.c | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c index 63cab2184e11..bf34209fcab1 100644 --- a/arch/arm64/kernel/entry-common.c +++ b/arch/arm64/kernel/entry-common.c @@ -384,10 +384,25 @@ static inline void fp_user_discard(void) } }
-UNHANDLED(el1t, 64, sync) -UNHANDLED(el1t, 64, irq) -UNHANDLED(el1t, 64, fiq) -UNHANDLED(el1t, 64, error) +asmlinkage void noinstr el1t_64_sync_handler(struct pt_regs *regs) +{ + el1h_64_sync_handler(regs); +} + +asmlinkage void noinstr el1t_64_irq_handler(struct pt_regs *regs) +{ + el1h_64_irq_handler(regs); +} + +asmlinkage void noinstr el1t_64_fiq_handler(struct pt_regs *regs) +{ + el1h_64_fiq_handler(regs); +} + +asmlinkage void noinstr el1t_64_error_handler(struct pt_regs *regs) +{ + el1h_64_error_handler(regs); +}
static void noinstr el1_abort(struct pt_regs *regs, unsigned long esr) {